1. Field of the Invention
The present invention relates to a semiconductor device having an insulated gate structure, and particularly to a press-contact type insulated gate type semiconductor device for handling of electrical power to an assembly of such a device and an external electrode and to a power inverter using such a device.
2. Description of the Prior Art
A semiconductor device of the insulated gate type, for example an insulated gate type bipolar transistor (hereinafter referred to as IGBT), has excellent features in terms of the gate drive system of a voltage type and high speed operation, and therefore has come to be extensively used even in the high voltage/large current field in which the gate turn off thyristor (hereinafter referred to as GTO) has been employed.
Prior art insulated gate type semiconductor devices are usually of a module structure in which a plurality of semiconductor chips of small current capacity are arranged in one package and are connected to external electrodes by wire bonding, soldering or the like. Such a structure has an inconvenience of reduced reliability due to breakage of wire bonding and cracking of solder caused by thermal fatigue. Moreover, with an increase in the number of semiconductor chips incorporated in a module, interconnect inductance and floating capacitance of wire bonding incorporated in the module are increased, and thereby the high frequency operation is made difficult.
To solve these problems, there is proposed a press-contact type structure, as used in a thyristor for electric power or GTO, in which electrode contact regions on one side of a semiconductor substrate are held in pressing contact with an external electrode plate. This eliminates the necessity of wire bonding and soldering, and thereby improves reliability and reduces interconnect inductance and floating capacitance. The press-contact type structure also enables heat release from both the surfaces of the semiconductor device, and thereby it is suitable for a large capacity semiconductor device. This structure, however, has a disadvantage that, when an excessive stress is applied due to irregularities on the surfaces of the contact electrode and the external electrode plate and the thermal contraction of the semiconductor device, a gate insulating film lying under the contact electrode will become deformed or broken, thereby deteriorating the reliability and the electrical characteristics thereof.
JP-A-3-218643 discloses a device structure in which the portions of the source electrode over the gate electrodes are thinner than the other portions thereof, so as to bridge over the gate electrodes. Apart from the difficulty of forming the source electrode of this shape, there is the risk that the thicker portions of the electrode are crushed by the pressing force, so that pressure is applied to the gate electrode.
JP-A-4-290272 and JP-A-4-322471 disclose a device structure in which there are lower portions and higher portions of the surface of the semiconductor substrate, and the gate electrodes are on the lower portions and the cathode electrodes or emitter electrodes are on the higher portions, so that the gate electrodes are not subjected to pressure by the external electrode plate. This device is also complicated to manufacture, and has another disadvantage in that non-uniformity of the sizes of the large number of lower and higher portions formed on the surface of the semiconductor substrate causes deterioration in withstand pressure and non-uniformity of carrying-current in the semiconductor device, thus deteriorating the turn-on or turn-off characteristic.
JP-A-4-274330 discloses a structure in which an aluminium electrode layer is partially removed at portions over the gate electrodes, so that the external electrode plate does not press directly on the gate electrode. However, there is the risk that the relatively soft aluminium is crushed or distorted by the pressure, so that it presses on the gate electrode.
Another problem to be solved in these devices is as follows. As the size of a semiconductor substrate is increased with demand for a large capacity, irrespective of the voltage drive type, the gate signal is retarded at a region remote from the gate terminal contacting the gate lead because of the gate electrode resistance. Consequently, in the semiconductor device, the switching operation is made uneven, so that current is locally concentrated upon switching. This may break the semiconductor device, and fails to give the desired characteristics.